From: Petr Lapukhov (petr@internetworkexpert.com)
Date: Thu Jun 28 2007 - 04:55:59 ART
Reading the lab and making diagrams could be also viewed as a nice
way to calm yourself down and reduce stress by the beginning of the
exam. They also help you building concentration and getting in focus.
It is well know that stress is the main enemy during the lab exam. So
if you come to the lab, having a clear plan in your head, and you keep
executing this plan, this will greatly help!
Of course, planning and diagramming requires some additional practice
along with your preparations. Do not underestimate importance of this
techniques, for they can really make the difference between passing or
failing.
-- Petr Lapukhov, CCIE #16379 (R&S/Security/SP) petr@internetworkexpert.comInternetwork Expert, Inc. http://www.InternetworkExpert.com
2007/6/28, Arin and Rachel Richmond <therichmonds@gmail.com>: > > Hi, > > I would definitely recommend reading the entire lab at the beginning to > identify any dependencies of one section on another. Say you had to put > Multicast on your topology and you were not permitted to use static > mroutes. > In this scenario you need to ensure your routing is complementary to the > paths that have PIM enabled, otherwise you will run into RPF issues. > > This is just one example of where you will come unstuck if you don't get > the > bigger picture at the start of the lab. Having said that, this will not > always be a problem, it depends heavily on the tasks of your lab, but how > do > you know if it will be a problem or not if you do not read ahead? > > As for diagrams. Do what feels right when you are practicing. Stick to the > same style and plan in the real thing. You will know how long it takes to > complete practice labs and if you have time to diagram or not, just be > sure > to budget extra time for the stress factor. > > Regards, > > Arin > CCIE #18318 > > On 28/06/07, Stephen Lee <slee@packet360.com> wrote: > > > > I don't know about that plan. > > > > In my experience if you do everything that was laid out in that plan you > > do not leave enough time for troubleshooting at the end. I finished the > > entire thing at 1:30 on my 1st and still didn't have enough time for > > troubleshooting a couple key things and failed by a couple points. > > > > I think redrawing something that is already given to you is just wasting > > precious time and that is something you cannot do and expect to pass. > > Also do you expect to remember something from the last section that you > > read 5 hours ago when you actually get to it? > > > > I have had multiple people who have passed it say just read the section > > you are working on thouroughly and don't worry about reading the entire > > lab at the beginning. You will not remember it by the time you get to it > > because you are so immersed in what you are doing that you just waste > > time in the beginning.... > > > > Just my .02 cents and everybody's brain works differently so what might > > work for me doesn't for someone else. > > > > Good luck on your 2nd attempt Eric. Mine is on 7/9... :) > > > > Thanks, > > Steve > > > > > > -----Original Message----- > > From: nobody@groupstudy.com [mailto:nobody@groupstudy.com] On Behalf Of > > Eric Dobyns > > Sent: Wednesday, June 27, 2007 7:23 PM > > To: ccielab@groupstudy.com > > Subject: More R&S Strategy > > > > Any more documents out there like this one? > > http://www.ksu.ru/petr/CCIE-RS-Checklist-draft-part-1-v2.txt > > > > _______________________________________________________________________ > > Subscription information may be found at: > > http://www.groupstudy.com/list/CCIELab.html > > > > _______________________________________________________________________ > > Subscription information may be found at: > > http://www.groupstudy.com/list/CCIELab.html > > _______________________________________________________________________ > Subscription information may be found at: > http://www.groupstudy.com/list/CCIELab.html
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