From: Price, Jamie (jprice@xxxxxxxxxxx)
Date: Tue Feb 29 2000 - 14:21:11 GMT-3
Title: Phase Shift
"Choose the highest clock rate available without inducing Phase Shift
or other line errors"
This is a configuration requirement in a test lab that I have. I have
searched for a definition of "Phase Shift" but am at a loss. If there
is someone out there that can explain what it is (or at least point me
to where I can find out) it would be much appreciated. I would like
to find out exactly what Phase Shift is, what clock rates fall within
the spectrum of not inducing this mysterious occurence, is the Phase
Shift/clock rate relationship dependant on the cable type in use, etc.
In a lab environment I have just been using 56000 or 115200 as a clock
rate - no problems. Come CCIE lab day however, should a line like
this appear in the config then I would don't want to run the risk of
losing even a single point for something as simple as a required clock
rate (even though I dont know what Phase Shift means) because I set it
too high meet the requirement.
Thanks in advance
Jamie
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