vpls

From: Aaron <aaron1_at_gvtc.com>
Date: Mon, 19 Mar 2012 09:01:08 -0500

As I understand it, pw's attached to a vpls group (I think known as a vfi)
within an ASR9K (or perhaps any vpls capable device) have a slit horizon
rule that disallows pw---to---pw switching (by default); something about
loop prevention. and thus because of this requires a full pw mesh between
vpls nodes. Is there a way around this or is that a hard fast rule? (ibgp
requires full mesh, but there's a way around it with rr's)

 

Aaron

Blogs and organic groups at http://www.ccie.net
Received on Mon Mar 19 2012 - 09:01:08 ART

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