Re: 3560 egress queue buffers

From: Vince Mashburn (cciegroupstudy@gmail.com)
Date: Wed Jan 31 2007 - 11:16:13 ART


Bob,

I have had the same question for some time now. I have run some tests and
tried to make the buffers fill up to see if I could spot any buffer failures
in the "show buffers" output. My thinking was that if I could spot the pool
where the failures are occurring then I would know where the buffers are
being pulled from, but no luck there. The only thing that I can think of
right now is that there is some sort of dynamic allocation from the RAM.
This is one of many features that are not well documented on the 3560.

Thanks

On 1/31/07, Bob Sinclair <bsinclair@netmasterclass.net> wrote:
>
> Is it possible to determine the number of buffers allocated to a 3560
> egress queue? The configuration guide tells us that buffer space can be
> allocated among the 4 queues, using a queue-set, as follows:
>
> mls qos queue-set output 1 buffers A B C D
>
> Were A, B, C and D are percentage values that must total 100. My
> question is "percentage of what number?" The same question could be
> asked about the Weighted Tail Drop thresholds. Is it possible to
> determine the absolute value of the buffer space allocated in packets or
> bytes?
>
> With the 3550 you can define buffer depth, in packets, using the reserve
> levels, but I see no analog in the 3560.
>
> Any input appreciated!
>
> --
> Thanks,
>
> Bob Sinclair CCIE 10427 CCSI 30427
> www.netmasterclass.net
>
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