From: Andrew (arousch@xxxxxxxx)
Date: Mon Apr 23 2001 - 17:41:16 GMT-3
Louie,
Again, you are incorrect. Take this sample output of a 2511 w/ 2 8MB FLASH
SIMMS running a 16MB IOS image.
.......................
AS2511#sh flash all
Partition Size Used Free Bank-Size State Copy Mode
1 16384K 15779K 604K 8192K Read ONLY RXBOOT-FLH
System flash directory:
File Length Name/status
addr fcksum ccksum
1 16158604 c2500-jos56i-l.121-7.bin
0x40 0x67DE 0x67DE
[16158668 bytes used, 618548 available, 16777216 total]
16384K bytes of processor board System flash (Read ONLY)
Chip Bank Code Size Name
1 1 01AD 2048KB AMD 29F016
2 1 01AD 2048KB AMD 29F016
3 1 01AD 2048KB AMD 29F016
4 1 01AD 2048KB AMD 29F016
1 2 01AD 2048KB AMD 29F016
2 2 01AD 2048KB AMD 29F016
3 2 01AD 2048KB AMD 29F016
4 2 01AD 2048KB AMD 29F016
Executing current image from System flash
==
AS2511#dir
Directory of flash:/
1 -rw- 16158604 Mar 06 2001 00:17:18 c2500-jos56i-l.121-7.bin
16777216 bytes total (618548 bytes free)
..................................
Shall I continue?
-Andrew
At 04:09 PM 4/23/01 -0400, louie kouncar wrote:
>Andrew,
>
>Well I can tell you that you are absolutely wrong, the IOS CAN NOT be
>divided over flash chips, it has to fit on one and only one, therefore, you
>will not be able to have an IOS that is larger than 8mg even if you have two
>8mg flash for a total of 16mg, they will still be two separate 8 mg flash.
>
>
>Thank you
>
>
>
>Louie J. Kouncar (CCIE)/Written
>TCO3 Senior Data Center Engineer
>UUNET
>W-703-343-6645
>C-703-304-2460
>
>
>
>-----Original Message-----
>From: Andrew [mailto:arousch@home.com]
>Sent: Monday, April 23, 2001 3:48 PM
>To: lkouncar@UU.NET; ccielab@groupstudy.com
>Subject: RE: Flash Upgrade
>
>
>Absolutely you can have 2 8MB flash chips and have them logically be 1 16MB
>of flash. You can also run a 15MB image across the two physical flash
>chips. Not sure if that was your point or not. You might be confusing the
>RAM slot (1) with the FLASH slots (2.)
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